Primary Job Title Technical Staff Primary Organization 
Freescale Semiconductor
Location Austin, Texas, United States Regions Southern US Gender Male
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Jack demonstrated remarkable leadership as Chairman of the JC-14.1 Subcommittee for Reliability Test Methods for Packaged Devices, a position he held for thirteen years. During his tenure as Chair, Jack guided the work of the subcommittee during one of the most significant shifts in electronic manufacturing processes to occur in the last fifty
years: the transition to lead-free solder.
Through his skilled guidance, Jack helped pave the way for the rapid development of the JEDEC and IPC joint standards that were urgently needed to enable lead-free manufacturing, and which remain some of the most frequently downloaded standards from the JEDEC website today.
Jack also provided invaluable support for the Lead Free Conferences held by JEDEC and IPC, which helped convey essential information about this critical topic when the technology was in its nascent stage.
Jack was a recipient of the 2002 Technical Recognition Award, JEDEC’s most significant award for technical achievement. He was a longtime member of the JEDEC Board of Directors on behalf of Intel. He also participated in the annual joint JEDEC JC-14/JEITA meetings for fifteen years, and served as a liaison between JEDEC and the IEC.
Jack was a voice of reason in his many roles within JEDEC, and a true gentleman. With his passing, JEDEC has lost tireless advocate. He is greatly missed.
