Company Performance Metrics
Silicon Drafting Institute provides professional IC mask layout design training focused on CMOS and BiCMOS integrated circuit layout. The Institute offers an eight-month, lecture- and lab-based program that combines technical theory with extensive hands-on layout projects. Students learn circuit theory, mixed-signal and high-speed layout
techniques, chip floor-planning, and verification practices. Training is delivered using Cadence EDA tools on Linux workstations, including Virtuoso layout and schematic editors, Assura and Dracula verification tools, and Chip Assembly Router. The program uses lecture videos viewed on site alongside supervised lab work and culminates in a complete mixed-signal transceiver chip layout project. Silicon Drafting Institute also provides interview preparation and job placement support for IC mask layout roles in the semiconductor industry.
