Company Performance Metrics
Atsushi Kasuya: CTO and Chief Architect
JEDA Technologies assists its customers and solution partners to turn hypothetical ESL benefits into reality by addressing high level model availability and quality hot spots in ESL deployments.
For system architecture exploration and performance analysis virtual platforms, JEDA provides products and methodology to ensure model quality for a
smooth platform integration, as well as intelligent device traffic generation for fast and early system simulation.
For high level synthesis (HLS) design flow, JEDA enables users to move design verification from RTL to high level. JEDA high level verification ( HLV) products includes advanced coverage tools for C/C++/SystemC models, automatic compliance checkers for AMBA, OCP and OSCI TLM-2.0, and intelligent traffic generators for devices such as various processors, video encoder/decoder, memory devices and graphic devices.
We serve leading semiconductor companies and advanced IP providers who adopted ESL design methodology globally. Founded in 2003, the founding team of JEDA comes from a deep Hardware Functional Verification background.
