“Siva is responsible for Tyfone’s product architecture, roadmap, and IP generation. Before his current responsibility, he was with Intel Laboratories from 1997 to 2004, where his research areas included minimizing impact of manufacturing variation through design, energy aware design, and exploring non-traditional solutions to facilitate Moore’s law of technology scaling. Apart from this he initiated research in industry’s first high-frequency fully-integrated miniature power converters and near load power management schemes.
He has authored over 60 technical papers in peer reviewed conferences and journals. He also has 57 issued and 55 pending patents in these areas. He holds 5 divisional recognition awards from Intel and an award in 2003 for having 19 issued patents in that year. He is a co-author and editor of the Leakage in Nanometer CMOS Technologies book published by Springer.
Siva is an Adjunct Faculty with the Departments of Electrical and Computer Engineering at Portland State University and Oregon State University. He is an active member of the Technical Program Committees of the following international conferences: ISSCC - Technology Directions, A-SSCC - Emerging Architecture and Technology, ISLPED, and ISQED. He served as an associate editor for the IEEE Transactions on VLSI systems for three years and in the DAC/ISSCC Student Design Contest Technical Program Committee for two years.
Siva has a Ph.D. degree in Electrical Engineering from Massachusetts Institute of Technology.” (Source: Tyfone)
